Inference Optimization Engineer
Company revealed to Pro
- Location
- San Francisco, California
- Pay
- Pay not listed
- Employment
- Full-time
Employer posted Oct 8 · Added to VDJ Oct 9 · Last checked today
AI company. This company doesn't make vertical drama. We list the role because the skills carry straight over to vertical work.
About the role
We’re looking for an Inference Optimization Engineer to work alongside our research team on making state-of-the-art visual models fast and efficient at inference time. Pro members see the company and apply now. It opens to everyone on November 7.
Skills and tools
Python
Benefits
- Health insurance
- Dental insurance
- Vision insurance
- 401(k)
Perks
- Equity
- Meals
What you'll do
- Work directly with research scientists and engineers to make new visual models fast and efficient at inference time.
- Profile model architectures and workloads to understand bottlenecks across compute, memory, communication, and model execution.
- Develop and implement new approaches to improving inference latency, throughput, memory efficiency, and GPU utilization.
- Explore algorithmic optimizations including quantization, sparsity, caching, compilation, attention optimizations, and alternative execution strategies.
- Build or optimize GPU kernels using CUDA, Triton, or similar technologies when existing implementations leave performance on the table.
- Optimize model execution across single-GPU, multi-GPU, and multi-node environments.
- Reason about the interaction between model architecture and hardware, and work with researchers when architectural changes can unlock meaningful performance improvements.
- Investigate communication, memory movement, parallelism, and distributed execution strategies for large visual models.
What they're looking for
- Deep technical ability in efficient ML inference, ML systems, GPU computing, or adjacent research, demonstrated through research, production engineering, open-source contributions, or unusually ambitious independent...
- Strong understanding of how modern deep learning models execute on hardware, including the relationship between compute, memory, communication, and performance.
- Experience profiling ML workloads, identifying bottlenecks, forming hypotheses, and driving measurable performance improvements.
- Strong programming fundamentals in Python, C++, or another systems-oriented language.
- Experience with some combination of PyTorch, CUDA, Triton, TensorRT, vLLM, SGLang, or comparable technologies.
- Ability to reason across abstraction layers rather than treating model architecture, framework, runtime, kernel, and hardware boundaries as fixed.
- Strong intuition for performance tradeoffs across latency, throughput, memory, numerical precision, model quality, and complexity.
- Curiosity about how models work internally and a willingness to modify or rethink existing approaches when the performance problem calls for it.
Nice to have
- Experience optimizing large generative, multimodal, vision, or video models.
- CUDA, Triton, CUTLASS, or other GPU kernel development.
- Deep knowledge of GPU architecture, memory hierarchy, and hardware-aware optimization.
- Experience with attention optimization, kernel fusion, memory-efficient execution, or custom operators.
- Model compilation or graph optimization experience.
- Quantization, sparsity, caching, speculative execution, or other efficient inference techniques.
We found this on the studio's own hiring page.
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